‚h‚b


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‚r‚m‚V‚S‚k‚r‚O‚O‚s‚hQuad 2 Input NAND
‚r‚m‚V‚S‚k‚r‚O‚S‚s‚hHex Inverters
‚r‚m‚V‚S‚k‚r‚O‚U‚s‚hHex O.C. Inverters
‚r‚m‚V‚S‚k‚r‚O‚W‚s‚hQuad 2 Input AND
‚r‚m‚V‚S‚k‚r‚P‚O‚s‚hTriple 3 Input NAND
‚r‚m‚V‚S‚k‚r‚P‚S‚s‚hHex Schmitt Trigger Inverters
‚r‚m‚V‚S‚k‚r‚P‚Q‚R‚s‚hDual Retriggerable Single Shot
‚r‚m‚V‚S‚k‚r‚P‚U‚P‚s‚hSynchronous Presettable Binary Counter with Clear
‚r‚m‚V‚S‚k‚r‚Q‚S‚S‚s‚hOctal 3-State Bus Buffers
‚r‚m‚V‚S‚k‚r‚Q‚V‚X‚s‚hQuad RS FF
‚r‚m‚V‚S‚k‚r‚`‚T‚V‚S‚s‚hOctal 3-State D-FFs
‚r‚m‚V‚S‚k‚r‚T‚X‚O‚s‚h8-Bit Binary Counter with Output Register
‚r‚m‚V‚S‚k‚r‚U‚W‚S‚s‚h8-Bit Magnitude Comparator
‚r‚m‚V‚S‚k‚r‚U‚W‚W‚s‚h8-Bit Equal-to Comparator
‚r‚m‚V‚T‚S‚T‚R‚a‚s‚h
‚g‚c‚P‚S‚O‚U‚X‚t‚a“ú—§Hex Inverter
‚g‚c‚V‚S‚O‚V“ú—§Hex O.C. Buffers
ƒÊ‚o‚b‚R‚R‚X‚b‚m‚d‚b
ƒÊ‚o‚b‚S‚T‚V‚Q‚m‚d‚b
ƒÊ‚o‚c‚S‚V‚O‚P‚`‚b‚m‚d‚b
ƒÊ‚o‚c‚T‚T‚T‚T‚b‚m‚d‚b
‚r‚s‚q‚X‚O‚O‚TƒTƒ“ƒPƒC
‚l‚b‚P‚S‚O‚T‚Q‚aƒ‚ƒgƒ��[ƒ‰Differential 4-Channel Multiplexer/Demultiplexer
‚l‚b‚P‚S‚T‚P‚R‚aƒ‚ƒgƒ��[ƒ‰BCD-to-Seven Segment Latch/Decoder/Driver
with Ripple Blanking
‚o‚b‚W‚P‚V‚r‚g‚`‚q‚oƒtƒHƒg�EƒJƒvƒ‰
‚o‚b‚W‚S‚V‚r‚g‚`‚q‚oƒtƒHƒg�EƒJƒvƒ‰
‚f‚`‚k‚P‚U‚u‚W‚r‚g‚`‚q‚o


�yŽQ�l•¶Œ£�z

"1985”N”Å�@�Å�V‚s‚s‚k‚h‚b‹KŠi•\�h‚b‚p�o”ÅŠ”Ž®‰ïŽÐ
"1986”N”Å�@�Å�V‚b-‚l‚n‚r‚h‚b‹KŠi•\�h‚b‚p�o”ÅŠ”Ž®‰ïŽÐ
"1995”N”Å�@�Å�V‚V‚SƒVƒŠ�[ƒY‚h‚b‹KŠi•\�h‚b‚p�o”ÅŠ”Ž®‰ïŽÐ
"1995”N”Å�@�Å�VŒõƒCƒ“ƒ^�[ƒtƒF�[ƒX‘fŽq‹KŠi•\�h ‚b‚p�o”ÅŠ”Ž®‰ïŽÐ


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