| PinΤ | PinΌΜ | ϋό | M | ΰe | @ | PinΤ | PinΌΜ | ϋό | M | ΰe |
| 1 | GND | @ | GND | @ | @ | 26 | GND | @ | GND | @ |
| 2 | CLK | © | Clock 8MHz | @ | @ | 27 | Vcc | @ | dΉ{Tu | @ |
| 3 | BRESET* | © | CPUZbgM | @ | @ | 28 | PWR* | © | Read*Write Select | 1=Read,0=Write |
| 4 | D00 | ©¨ | DATA 20 | @ | @ | 29 | IDA* | © | ID PROM Select M | @ |
| 5 | D01 | ©¨ | DATA 21 | @ | @ | 30 | H1 | © | high level όΝ | @ |
| 6 | D02 | ©¨ | DATA 22 | @ | @ | 31 | MEMSELA* | © | Memory R*W Cycle M | ’gp |
| 7 | D03 | ©¨ | DATA 23 | @ | @ | 32 | H2 | © | high level όΝ | @ |
| 8 | D04 | ©¨ | DATA 24 | @ | @ | 33 | INTSELA* | © | Interrupt M | @ |
| 9 | D05 | ©¨ | DATA 25 | @ | @ | 34 | H3 | © | high level όΝ | @ |
| 10 | D06 | ©¨ | DATA 26 | @ | @ | 35 | IOSELA* | © | I/O Cycle M | @ |
| 11 | D07 | ©¨ | DATA 27 | @ | @ | 36 | H4 | © | high level όΝ | @ |
| 12 | D08 | ©¨ | DATA 28 | ’gp | @ | 37 | ADDR1 | © | Adress 21 | @ |
| 13 | D09 | ©¨ | DATA 29 | ’gp | @ | 38 | H5 | © | high level όΝ | @ |
| 14 | D10 | ©¨ | DATA 210 | ’gp | @ | 39 | ADDR2 | © | Adress 22 | @ |
| 15 | D11 | ©¨ | DATA 211 | ’gp | @ | 40 | H6 | © | high level όΝ | @ |
| 16 | D12 | ©¨ | DATA 212 | ’gp | @ | 41 | ADDR3 | © | Adress 23 | @ |
| 17 | D13 | ©¨ | DATA 213 | ’gp | @ | 42 | IRQA0* | ¨ | InterruptM(έ level=4) | @ |
| 18 | D14 | ©¨ | DATA 214 | ’gp | @ | 43 | ADDR4 | © | Adress 24 | @ |
| 19 | D15 | ©¨ | DATA 215 | ’gp | @ | 44 | IRQA1* | ¨ | InterruptM(έ level=5) | ’gp |
| 20 | BS0* | © | Byte Select (ΊΚoCg) | BS0*=0(active) | @ | 45 | ADDR5 | © | Adress25 | @ |
| 21 | BS1* | © | Byte Select (γΚoCg) | BS1*=1(negactive) | @ | 46 | H7 | © | high level όΝ | @ |
| 22 | V- | @ | dΉ-12V | ’gp | @ | 47 | ADDR6 | © | Adress26 | @ |
| 23 | V+ | @ | dΉ+12V | ’gp | @ | 48 | ACKA* | ¨ | Acknowledge | @ |
| 24 | Vcc | @ | dΉ+5V | @ | @ | 49 | +5PSTBT | @ | VIPC310{[hΜobe[dΉ | f[^ΫΆpA’gp |
| 25 | GND | @ | GND | @ | @ | 50 | GND | @ | GND | @ |