/*	addresses of PI/T 0 registers	for MMI*/

#define	PGCR0	0xfdfc01	/*	Port General Control Reg.	*/
#define	PSRR0	0xfdfc03	/*	Port Select Request Reg.	*/
#define	PADDR0	0xfdfc05	/*	Port A Data Direction Reg.	*/
#define	PBDDR0	0xfdfc07	/*	Port B Data Direction Reg.	*/
#define	PCDDR0	0xfdfc09	/*	Port C Data Direction Reg.	*/
#define	PIVR0	0xfdfc0b	/*	Port Interrupt Vector Reg.	*/
#define	PACR0	0xfdfc0d	/*	Port A Control Reg.		*/
#define	PBCR0	0xfdfc0f	/*	Port B Control Reg.		*/
#define	PADR0	0xfdfc11	/*	Port A Data Reg.		*/
#define	PBDR0	0xfdfc13	/*	Port B Data Reg.		*/
#define	PAAR0	0xfdfc15	/*	Port A Alternate Reg.		*/
#define	PBAR0	0xfdfc17	/*	Port B Alternate Reg.		*/
#define	PCDR0	0xfdfc19	/*	Port C Data Reg.		*/
#define	PSR0	0xfdfc1b	/*	Port Status Reg.		*/
#define	TCR0	0xfdfc21	/*	Timer Control Reg.		*/
#define	TIVR0	0xfdfc23	/*	Timer Interrupt Vector Reg.	*/
#define	CPR0	0xfdfc25	/*	Counter Preload Reg.		*/
#define	CNTR0	0xfdfc2d	/*	Counter Reg.			*/
#define	TSR0	0xfdfc35	/*	Timer Status Reg.		*/


/*	I/O Base Address	*/

#define	IO_BASE	0xfc6000


/*	IP A base address	*/

#define	IP_A	IO_BASE


/*	addresses of rotary encoder/touch sensor	*/

#define	EDRL	IP_A+0x01	/*	Encoder Data of Right (Low)	*/ 
#define	EDRH	IP_A+0x03	/*	Encoder Data of Right (High)	*/
#define	EDLL	IP_A+0x05	/*	Encoder Data of Left (Low)	*/
#define	EDLH	IP_A+0x07	/*	Encoder Data of Left (High)	*/
#define	CRST	IP_A+0x09	/*	Counter Reset			*/
#define	TSIE	IP_A+0x0b	/*	Touch Sensor Interrupt Enable	*/


/*	IP B base address	*/

#define IP_B	IO_BASE+0x0100


/*	addresses of PI/T 1 registers	for pwm*/

#define	PGCR1	IP_B+0x01	/*	Port General Control Reg.	*/
#define	PSRR1	IP_B+0x03	/*	Port Select Request Reg.	*/
#define	PADDR1	IP_B+0x05	/*	Port A Data Direction Reg.	*/
#define	PBDDR1	IP_B+0x07	/*	Port B Data Direction Reg.	*/
#define	PCDDR1	IP_B+0x09	/*	Port C Data Direction Reg.	*/
#define	PIVR1	IP_B+0x0b	/*	Port Interrupt Vector Reg.	*/
#define	PACR1	IP_B+0x0d	/*	Port A Control Reg.		*/
#define	PBCR1	IP_B+0x0f	/*	Port B Control Reg.		*/
#define	PADR1	IP_B+0x11	/*	Port A Data Reg.		*/
#define	PBDR1	IP_B+0x13	/*	Port B Data Reg.		*/
#define	PAAR1	IP_B+0x15	/*	Port A Alternate Reg.		*/
#define	PBAR1	IP_B+0x17	/*	Port B Alternate Reg.		*/
#define	PCDR1	IP_B+0x19	/*	Port C Data Reg.		*/
#define	PSR1	IP_B+0x1b	/*	Port Status Reg.		*/
#define	TCR1	IP_B+0x21	/*	Timer Control Reg.		*/
#define	TIVR1	IP_B+0x23	/*	Timer Interrupt Vector Reg.	*/
#define	CPR1	IP_B+0x25	/*	Counter Preload Reg.		*/
#define	CNTR1	IP_B+0x2d	/*	Counter Reg.			*/
#define	TSR1	IP_B+0x35	/*	Timer Status Reg.		*/


/*	addresses of PI/T 2 registers	for sss&photo*/

#define	PGCR2	IP_B+0x41	/*	Port General Control Reg.	*/
#define	PSRR2	IP_B+0x43	/*	Port Select Request Reg.	*/
#define	PADDR2	IP_B+0x45	/*	Port A Data Direction Reg.	*/
#define	PBDDR2	IP_B+0x47	/*	Port B Data Direction Reg.	*/
#define	PCDDR2	IP_B+0x49	/*	Port C Data Direction Reg.	*/
#define	PIVR2	IP_B+0x4b	/*	Port Interrupt Vector Reg.	*/
#define	PACR2	IP_B+0x4d	/*	Port A Control Reg.		*/
#define	PBCR2	IP_B+0x4f	/*	Port B Control Reg.		*/
#define	PADR2	IP_B+0x51	/*	Port A Data Reg.		*/
#define	PBDR2	IP_B+0x53	/*	Port B Data Reg.		*/
#define	PAAR2	IP_B+0x55	/*	Port A Alternate Reg.		*/
#define	PBAR2	IP_B+0x57	/*	Port B Alternate Reg.		*/
#define	PCDR2	IP_B+0x59	/*	Port C Data Reg.		*/
#define	PSR2	IP_B+0x5b	/*	Port Status Reg.		*/
#define	TCR2	IP_B+0x61	/*	Timer Control Reg.		*/
#define	TIVR2	IP_B+0x63	/*	Timer Interrupt Vector Reg.	*/
#define	CPR2	IP_B+0x65	/*	Counter Preload Reg.		*/
#define	CNTR2	IP_B+0x6d	/*	Counter Reg.			*/
#define	TSR2	IP_B+0x75	/*	Timer Status Reg.		*/


/*	addresses of RTC(real time clock)	*/

#define	MSR	0xfdfe01	/*	RTC Main Status Reg.		*/
#define	RTMR	0xfdfe03	/*	RTC Real Time Mode Reg.		*/
#define	OMR	0xfdfe05	/*	RTC Output Mode Reg.		*/
#define	PFIC	0xfdfe07	/*	RTC Interrupt Control Reg. 0	*/
#define	TSIC	0xfdfe09	/*	RTC Interrupt Control Reg. 1	*/


/*	VMEbus IRQ-mask register	*/

#define	VIMR	0xfdff01


/*	data of timer interrupt reset	*/

#define	TMRST	0x44		/*	Timer Interrupt Reset		*/


/*	data for supersonic wave sensor		*/

#define	SSS_LIMIT	(int)(3*8000000/32/340*2)


/*	number of 7seg.LED	*/

#define	LED_NO	4


/*	number of supersonic wave sensor	*/

#define	SSS_NO	4

/*	number of task	*/
/*	on 1/13 by Sei	*/

#define MAXTSK 10